The technology described herein relates to data processing systems, and in particular to the processing of data when generating a surface for display on a display in a data processing system.
In data processing systems, an image that is to be displayed will typically be processed by a number of processing stages before it is finally displayed on a display.
For example, one or more frame generators such as a graphics processing unit (GPU), video engine, etc., will generate frames (surfaces) that are to contribute to the final, displayed, surface.
In addition, a composition engine may combine plural individual input surfaces into a composited output surface.
The final surface (e.g. the composited frame) to be displayed is usually stored in a frame buffer in memory, from where it is read by the display controller for the display (e.g. by internal Direct Memory Access (DMA)). The display controller then sends the frame to the display for display (e.g. via a pixel pipeline) (the display may, e.g., be a screen or printer).
The bandwidth cost of sending pixel data from the display controller to the display can be significant. One way to reduce the bandwidth required and power required for a data processing system is to compress the pixel data that is transmitted from the display controller to the display. For example, display controllers may use Display Stream Compression (DSC) (which is designed to be a mathematically lossy, but “visually lossless” (i.e. unnoticeable to the user) compression scheme) to compress pixel data sent from a display controller to a display.
Although such compression techniques are successful in reducing the power and bandwidth requirements of the system, the Applicants believe that there remains scope for improvements to such data processing systems.
Like reference numerals are used for like components throughout the drawings, where appropriate.